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1 #include "crc32.h" |
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2 |
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3 /* |
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4 * updcrc derived from article Copyright (C) 1986 Stephen Satchell. |
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5 * NOTE: First argument must be in range 0 to 255. |
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6 * Second argument is referenced twice. |
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7 * |
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8 * Programmers may incorporate any or all code into their programs, |
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9 * giving proper credit within the source. Publication of the |
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10 * source routines is permitted so long as proper credit is given |
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11 * to Stephen Satchell, Satchell Evaluations and Chuck Forsberg, |
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12 * Omen Technology. |
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13 */ |
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14 |
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15 /* Use a type unsigned long int variable to store the crc value. |
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16 * Initialise the variable to 0xFFFFFFFF before running the crc routine. |
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17 * VERY IMPORTANT!!!! -> This routine was developed for data communications |
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18 * and returns the crc bytes in LOW to HIGH order, NOT byte reversed! |
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19 * To turn the valu into a 'normal' LONGINT, you must reverse the bytes! |
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20 * e.g. |
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21 * |
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22 * FOR(c=1; c<=4; c++) (* reverse *) |
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23 * l = (l << 8) | (byte)crc; (* the bytes *) |
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24 * (* l now contains the 'normalized' crc *) |
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25 */ |
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26 |
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27 /* Copyright (C) 1986 Gary S. Brown. You may use this program, or |
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28 * code or tables extracted from it, as desired without restriction. |
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29 * |
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30 * First, the polynomial itself and its table of feedback terms. The |
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31 * polynomial is |
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32 * X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0 |
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33 * Note that we take it "backwards" and put the highest-order term in |
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34 * the lowest-order bit. The X^32 term is "implied"; the LSB is the |
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35 * X^31 term, etc. The X^0 term (usually shown as "+1") results in |
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36 * the MSB being 1. |
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37 * |
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38 * Note that the usual hardware shift register implementation, which |
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39 * is what we're using (we're merely optimizing it by doing eight-bit |
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40 * chunks at a time) shifts bits into the lowest-order term. In our |
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41 * implementation, that means shifting towards the right. Why do we |
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42 * do it this way? Because the calculated CRC must be transmitted in |
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43 * order from highest-order term to lowest-order term. UARTs transmit |
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44 * characters in order from LSB to MSB. By storing the CRC this way, |
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45 * we hand it to the UART in the order low-byte to high-byte; the UART |
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46 * sends each low-bit to hight-bit; and the result is transmission bit |
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47 * by bit from highest- to lowest-order term without requiring any bit |
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48 * shuffling on our part. Reception works similarly. |
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49 * |
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50 * The feedback terms table consists of 256, 32-bit entries. Notes: |
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51 * |
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52 * The table can be generated at runtime if desired; code to do so |
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53 * is shown later. It might not be obvious, but the feedback |
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54 * terms simply represent the results of eight shift/xor opera- |
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55 * tions for all combinations of data and CRC register values. |
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56 * |
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57 * The values must be right-shifted by eight bits by the "updcrc" |
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58 * logic; the shift must be unsigned (bring in zeroes). On some |
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59 * hardware you could probably optimize the shift in assembler by |
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60 * using byte-swap instructions. |
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61 * polynomial 0xedb88320 |
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62 */ |
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63 |
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64 const crc32_t crc32tab[] = { /* a table of 32-bit CRC feedback terms */ |
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65 0x00000000L, 0x77073096L, 0xee0e612cL, 0x990951baL, |
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66 0x076dc419L, 0x706af48fL, 0xe963a535L, 0x9e6495a3L, |
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67 0x0edb8832L, 0x79dcb8a4L, 0xe0d5e91eL, 0x97d2d988L, |
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68 0x09b64c2bL, 0x7eb17cbdL, 0xe7b82d07L, 0x90bf1d91L, |
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69 0x1db71064L, 0x6ab020f2L, 0xf3b97148L, 0x84be41deL, |
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70 0x1adad47dL, 0x6ddde4ebL, 0xf4d4b551L, 0x83d385c7L, |
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71 0x136c9856L, 0x646ba8c0L, 0xfd62f97aL, 0x8a65c9ecL, |
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72 0x14015c4fL, 0x63066cd9L, 0xfa0f3d63L, 0x8d080df5L, |
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73 0x3b6e20c8L, 0x4c69105eL, 0xd56041e4L, 0xa2677172L, |
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74 0x3c03e4d1L, 0x4b04d447L, 0xd20d85fdL, 0xa50ab56bL, |
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75 0x35b5a8faL, 0x42b2986cL, 0xdbbbc9d6L, 0xacbcf940L, |
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76 0x32d86ce3L, 0x45df5c75L, 0xdcd60dcfL, 0xabd13d59L, |
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77 0x26d930acL, 0x51de003aL, 0xc8d75180L, 0xbfd06116L, |
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78 0x21b4f4b5L, 0x56b3c423L, 0xcfba9599L, 0xb8bda50fL, |
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79 0x2802b89eL, 0x5f058808L, 0xc60cd9b2L, 0xb10be924L, |
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80 0x2f6f7c87L, 0x58684c11L, 0xc1611dabL, 0xb6662d3dL, |
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81 0x76dc4190L, 0x01db7106L, 0x98d220bcL, 0xefd5102aL, |
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82 0x71b18589L, 0x06b6b51fL, 0x9fbfe4a5L, 0xe8b8d433L, |
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83 0x7807c9a2L, 0x0f00f934L, 0x9609a88eL, 0xe10e9818L, |
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84 0x7f6a0dbbL, 0x086d3d2dL, 0x91646c97L, 0xe6635c01L, |
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85 0x6b6b51f4L, 0x1c6c6162L, 0x856530d8L, 0xf262004eL, |
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86 0x6c0695edL, 0x1b01a57bL, 0x8208f4c1L, 0xf50fc457L, |
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87 0x65b0d9c6L, 0x12b7e950L, 0x8bbeb8eaL, 0xfcb9887cL, |
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88 0x62dd1ddfL, 0x15da2d49L, 0x8cd37cf3L, 0xfbd44c65L, |
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89 0x4db26158L, 0x3ab551ceL, 0xa3bc0074L, 0xd4bb30e2L, |
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90 0x4adfa541L, 0x3dd895d7L, 0xa4d1c46dL, 0xd3d6f4fbL, |
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91 0x4369e96aL, 0x346ed9fcL, 0xad678846L, 0xda60b8d0L, |
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92 0x44042d73L, 0x33031de5L, 0xaa0a4c5fL, 0xdd0d7cc9L, |
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93 0x5005713cL, 0x270241aaL, 0xbe0b1010L, 0xc90c2086L, |
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94 0x5768b525L, 0x206f85b3L, 0xb966d409L, 0xce61e49fL, |
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95 0x5edef90eL, 0x29d9c998L, 0xb0d09822L, 0xc7d7a8b4L, |
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96 0x59b33d17L, 0x2eb40d81L, 0xb7bd5c3bL, 0xc0ba6cadL, |
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97 0xedb88320L, 0x9abfb3b6L, 0x03b6e20cL, 0x74b1d29aL, |
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98 0xead54739L, 0x9dd277afL, 0x04db2615L, 0x73dc1683L, |
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99 0xe3630b12L, 0x94643b84L, 0x0d6d6a3eL, 0x7a6a5aa8L, |
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100 0xe40ecf0bL, 0x9309ff9dL, 0x0a00ae27L, 0x7d079eb1L, |
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101 0xf00f9344L, 0x8708a3d2L, 0x1e01f268L, 0x6906c2feL, |
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102 0xf762575dL, 0x806567cbL, 0x196c3671L, 0x6e6b06e7L, |
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103 0xfed41b76L, 0x89d32be0L, 0x10da7a5aL, 0x67dd4accL, |
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104 0xf9b9df6fL, 0x8ebeeff9L, 0x17b7be43L, 0x60b08ed5L, |
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105 0xd6d6a3e8L, 0xa1d1937eL, 0x38d8c2c4L, 0x4fdff252L, |
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106 0xd1bb67f1L, 0xa6bc5767L, 0x3fb506ddL, 0x48b2364bL, |
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107 0xd80d2bdaL, 0xaf0a1b4cL, 0x36034af6L, 0x41047a60L, |
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108 0xdf60efc3L, 0xa867df55L, 0x316e8eefL, 0x4669be79L, |
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109 0xcb61b38cL, 0xbc66831aL, 0x256fd2a0L, 0x5268e236L, |
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110 0xcc0c7795L, 0xbb0b4703L, 0x220216b9L, 0x5505262fL, |
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111 0xc5ba3bbeL, 0xb2bd0b28L, 0x2bb45a92L, 0x5cb36a04L, |
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112 0xc2d7ffa7L, 0xb5d0cf31L, 0x2cd99e8bL, 0x5bdeae1dL, |
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113 0x9b64c2b0L, 0xec63f226L, 0x756aa39cL, 0x026d930aL, |
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114 0x9c0906a9L, 0xeb0e363fL, 0x72076785L, 0x05005713L, |
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115 0x95bf4a82L, 0xe2b87a14L, 0x7bb12baeL, 0x0cb61b38L, |
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116 0x92d28e9bL, 0xe5d5be0dL, 0x7cdcefb7L, 0x0bdbdf21L, |
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117 0x86d3d2d4L, 0xf1d4e242L, 0x68ddb3f8L, 0x1fda836eL, |
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118 0x81be16cdL, 0xf6b9265bL, 0x6fb077e1L, 0x18b74777L, |
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119 0x88085ae6L, 0xff0f6a70L, 0x66063bcaL, 0x11010b5cL, |
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120 0x8f659effL, 0xf862ae69L, 0x616bffd3L, 0x166ccf45L, |
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121 0xa00ae278L, 0xd70dd2eeL, 0x4e048354L, 0x3903b3c2L, |
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122 0xa7672661L, 0xd06016f7L, 0x4969474dL, 0x3e6e77dbL, |
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123 0xaed16a4aL, 0xd9d65adcL, 0x40df0b66L, 0x37d83bf0L, |
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124 0xa9bcae53L, 0xdebb9ec5L, 0x47b2cf7fL, 0x30b5ffe9L, |
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125 0xbdbdf21cL, 0xcabac28aL, 0x53b39330L, 0x24b4a3a6L, |
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126 0xbad03605L, 0xcdd70693L, 0x54de5729L, 0x23d967bfL, |
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127 0xb3667a2eL, 0xc4614ab8L, 0x5d681b02L, 0x2a6f2b94L, |
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128 0xb40bbe37L, 0xc30c8ea1L, 0x5a05df1bL, 0x2d02ef8dL |
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129 }; |
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130 |
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131 #ifdef __cplusplus |
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132 crc32_t crc32_c::update (const unsigned char *s, int len) |
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133 /* update running CRC calculation with contents of a buffer */ |
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134 { |
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135 register crc32_t a = val; |
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136 while(len-- > 0) |
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137 a = crc32_update (a, *s++); |
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138 return (val = a) ^ CRC32INIT; |
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139 } |
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140 #endif |